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Final Report of the COST-247 Action

The Modeling and Analysis of Frame Synchronized Ring with Predicate/Transition Nets

Tino Pyssysalo

Computer Engineering Laboratory
Department of Electrical Engineering
University of Oulu
P.O. Box 444
FIN-90571 Oulu, Finland
tel: +358-8-553 2701
fax: +358-8-553 2612


The Frame Synchronized Ring (FSR) is a high speed interconnection network (up to 1.6 Gbps and more) developed for a wide range of real-time switching applications in Technical Research Centre of Finalnd (VTT). Examples of such applications are components of Asynchronous Transfer Mode (ATM) networks, high throughput local area networks (LAN) and the distribution of Video on Demand (VOD) services. The high throughput of the FSR is due to an effective distributed medium access control (MAC) mechanism. Some interesting properties of the MAC (e.g. the deadlock freeness, the fairness and maximal worst case waiting sequences) have been extensively analyzed with analytical models and simulations. In this work we use prdecate/transition net formalism (Pr/T-nets) in the modeling and analysis of the FSR. We prove the properties listed above with the Pr/T-net reachability analysis tool, PROD. In addition, we show how the state space of the reachability graph can be reduced by integrating the internal operations of the MAC into as few transitions as possible.

This presentation has been given during the COST-247 4th Management Committee Meeting (Berlin, Germany, February 9--10, 1995).

COST-247 Working Group(s): 2

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