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| Final Report of the COST-247 Action |
Hardware Implementation of LOTOS specifications
Tomas de Miguel, Tomas Robles Valladares
| Dept. Ingenieria de Sistemas Telematicos |
| Universidad Politecnica de Madrid |
| ETSI Telecomunicacion |
| E-28040 Madrid |
| Spain |
| E-mail: robles@dit.upm.es |
Our group has developed a compiler from LOTOS to VHDL. Such compiler performs translation of behaviour, data types and time annotations. Translation may be done with three targets: simulation, implementation or testing.
This presentation has been given during the COST-247 7th Management Committee Meeting (Madrid, Spain, February, 12--13, 1995).
COST-247 Working Group(s): 1
This Page was prepared by Mark Jorgensen.
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