One-week intensive course on
Hardware Description Languages for Synchronous Circuits

Gordon Pace, Koen Claessen

Course Page

4th-8th September

Hardware description languages (HDLs) are used to describe the expected behaviour of a circuit. These descriptions are then manually or automatically compiled (synthesised) into circuits. This allows faster development of hardware, and can also help reduce the number of bugs that will arise in the design process. This intensive course aims at providing a brief glimpse of different synchronous-HDL paradigms leading up to a discussion on the combination of different hardware description and design techniques.
Morning session
Afternoon session
Exercises session
Monday Introduction Arithmetic Circuits Designing
small circuits
Tuesday Verilog I Verilog II Designing circuits
with Verilog
Wednesday Lava I Lava II Designing
circuits in Lava
Thursday Hardware Compilation (No Lecture) Hardware
Friday Advanced
Hardware Compilation

Monday sessions will be held in room S4. The rest of the week the sessions will be in room S1.


The afternoons, between 14:30 and 16:30, will be dedicated to solving the exercises provided. We will be available during this time to help with any problems that you may have.

If you want to be given the points associated with the course, complete the exercises by Friday afternoon. Once you complete any of the exercises, you can contact one of us (Gordon or Koen) for them to be marked.

Only Tuesday's, Wednesday's and Thursday's exercises are obligatory. Also, note that the exercises marked with an asterisk (*) are more difficult and you are not required to solve them to get the points.

A short overview of hardware and how it can be described and designed.
Arithmetic Circuits
More about the design of circuits, with particular emphasis on arithmetic circuits.
Verilog I
An introduction to the Verilog HDL as a typical simulation based HDL. Structural and behavioural descriptions. Test benches for testing.
Verilog II
The simulation cycle in more detail. An overview of high-level behavioural synthesis of Verilog.
Lava I
The use of a functional programming language to describe hardware. Parametrised circuits, circuit combinators.
Lava II
Translating state machines into hardware using Lava.
Hardware Compilation
The compilation of an imperative language Mini-Flash to hardware.
Advanced Hardware Compilation
Adding assignment and scoping to Mini-Flash. Combining different programming languages to describe hardware. Generic circuit descriptions.
A closing discussion about hardware design.
Reading list
HDLs in general
Verilog and VHDL
Other HDLs