Claude Helmstetter's Home Page

(01/01/2010) New Home Page Address is

Brief Biography


Since November 2008, I am a post-doctorate researcher in the VASY project of the INRIA Rhône-Alpes research center. I study the verfication of asynchronous concurrent systems. I have already worked in this team during summer 2007.

From September 2007 to October 2008, I was post-doctorate researcher in the DeviceWare project team of the LIAMA sino-french laboratory. I was designing functional simulators of embedded systems, for embedded software validation. This lab is located in Beijing; it is part of INRIA. My chief was Vania Joloboff.

From December 2003 to June 2007, I have been working in the Synchronous team of the Verimag laboratory, in collaboration with the SPG team of STMicroelectronics. I was PhD student, and I got my PhD in March 2007. My advisor was Florence Maraninchi.

Research Topics and Publications

My main interest lies in the validation of asynchronous systems, using simulation, automatic test generation, or formal verification techniques. Functional models of Systems on Chips (SoCs) are generally written in SystemC using the TLM library. They are mainly used for the validation of the embedded software. Dynamic partial order reduction gives very good results on this kind of programs.

Research Topics

  • Dynamic partial order reduction and automatic test generation
  • Functional modeling of embedded systems, faithfulness of models
  • Validation of embedded software and robustness checking
  • Fast hardware emulation using SystemC, TLM and dynamic translation


Open-source Software


During my PhD, I have taught to Telecom students of Ensimag engineer school.

Software Engineering Project
4 weeks project to train the students with Software Engineering by doing them realize a compiler for an imperative language, in 4-student team; 55 hours in January 2005 and in January 2006.
Unix Training Course
Initiation to computer science and UNIX; 9 hours in September 2004 and 12 hours in September 2005.